Apple M1 Microarchitecture Research by Dougall Johnson

Firestorm: Overview | Base Instructions | SIMD and FP Instructions
Icestorm:  Overview | Base Instructions | SIMD and FP Instructions

LD1 (multiple, two registers, 16B)

Test 1: uops

Code:

  ld1 { v0.16b, v1.16b }, [x6]
  nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop ; nop
  mov x0, 1
  mov x1, 2
  mov x8, 0

(no loop instructions)

1000 unrolls and 1 iteration

Retires (minus 60 nops): 2.000

Issues: 2.000

Integer unit issues: 0.000

Load/store unit issues: 2.000

SIMD/FP unit issues: 0.000

retire (01)cycle (02)030407080b0e0f18191e2223243a3f464951inst issue (52)~issue ld/st (55)~dispatch ld/st (58)huge thing ld/st (5a)5f696d6escheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op ld/st (7d)~map lookup ld/st (80)8283pipeline redirect (84)85inst all (8c)inst fp/simd load (98)inst ldst (9b)9da0a1a3a6a8acafb5bbdcache load miss (bf)c2cfd0d2icache miss (d3)d5d6d9dadbddinst fetch restart (de)e0eaebecld/st retires (ed)f5f6f7f8fd
620052937822012000000400048052896100243132000200020001000011606528825293523102000200020002915629101116100110001000020000420000020004000128859625682830225920671324638221748452844915763138391563020002941829305294232945029372
620042933822030000000310045782883200242222000200020001000001605228593293083102000200020002923629199116100110001000020000420000420004260135579139706032674420702334438241243452836916385137931574620002929729318293732940229284
620042939622140001100000048112886400242112000200020001000011605528606293123102000200020002911429261116100110001000020000420000020004040134789278681630534720706301238251442442840416527137371577520002948629405292962942529358
620042937221910000000300049502899300242502000200020001000001605928924292483102000200020002916329099116100110001000020000420000020004040133539832687632174620724307538241644422837216585136941500020002933729325292672940629304
620042931322010001100400045742882320242532000200020001000001605928549294083102000200020002911129124116100110001000020000420000020000040134619655704330554620655319438201052462832716042138181558820002928529333293702927529414
620042937621910000000000046542892500243322000200020001000021606528848293273102000200020002922929140116100110001000020000620000020004000135509184683931083620673305538181641442844216319134591551520002932629283293052931729462
620042927722000001000300045342884400241852000200020001000001606228629294483102000200020002922829333116100110001000020000420000020004040128119157689530524420696303138181444452838116383134221509820002931229427293202933429354
620042927422010001100000045752896400242132000200020001000021607428588293013102000200020002916129154116100110001000120000420000020004000128649147688730835120735323438121545482863915818136891568120002919429236293522935429341
620042933021910000100300045702899300243122002200020001000061605728624293603102000200020002917129084116100110001000020000420000020004000127949220707131154220707300938231847432842116398137851565620002938429382292772934629290
62004292852201010010031004627289560024288200020002000100006160582865329305310200020002000291212906011610011000100002000042000032000404212844960268143098392079930523817743502847516492137431570720002936729470293092933929493

Test 2: Latency 1->3 roundtrip

Chain cycles: 3

Code:

  ld1 { v0.16b, v1.16b }, [x6]
  fmov x0, d0
  eor x8, x8, x0
  eor x8, x8, x0
  add x6, x6, x8
  mov x0, 1
  mov x1, 2
  mov x8, 0

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code, minus 3 chain cycles): 9.0047

retire (01)cycle (02)030b0e0f181e2223243f4d4f51inst issue (52)~issue int (53)~issue fp/simd (54)~issue ld/st (55)~dispatch int (56)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map op fp/simd (7e)~map lookup int (7f)~map lookup ld/st (80)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst fp/simd load (98)inst ldst (9b)9d9fa0a1a3a6a8a9acafb5dcache load miss (bf)c2c5cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)eaebecld/st retires (ed)gpr retires (ef)f5f6f7f8fd
602051200518990000210012003696718109740257010340102100012000030100100002000010426743573266634656260120105012005112023511213913112564604483020020000100006020020000100001200511200511150201100991004010010000100001100200000220000000200002200032101161111982440002101092000040100120055120054120052120052120052
602041200518990000121001200399671610974025701354010210007200043019210123200001043262857390003468748012011001201471201471122723112509601003020020000100006020020000100001200511200511150202100991004010010000100001100200000020000100200002200032101161111982640002101092000040100120052120052120052120052120052
602041200518990000141001200369671910974125701034010210001200003010010000200001043137057334363465156012002701200511200511121393112509601003020020000100006020020000100001200511200511150201100991004010010000100001100200000220000000200002200032101161111982440002101092000040100120052120052120052120052120052
602041200518990000200012003696716109740257010340102100012000030100100002000010426743573343634656260120027312005112005111213931125096010030200200001000060200200001009612005712005111502011009910040100100001000011002000002200000002000022000321011611119820400020652000040100120048120048120048120048120048
602041200478990000001012003296712109736257010340102100012000030100100002000010426395573324434655100120023012004712004711213531125056010030200200001000060200200001000012003512004711502011009910040100100001000001002000002200000002000022000321011611119820400026652000040100120048120048120048120048120048
602041200478990000200012003296712109736257010340102100012000030100100002000010426395573324434655100120023012004712004711212331125056010030200200001000060200200001000012004712004711502011009910040100100001000001002000002200000002000020000321011611119820400026652000040100120048120048120048120048120048
602041200479000000201012003296712109736257010340100100012000030100100002000010426395573324434655100120023012003512004711216031125056010030200200001000060200200001000012004712003511502011009910040100100001000001002000000200000002000022000321042711119820400026652000040100120048120048120048120048120036
602041200478990010200112003296712109736257010340102100012000030100100002000010426395573324434655100120026012004712004711213531125056010030200200001000060200200001000012004712004711502011009910040100100001000001002000002200000002000020000321011611119820400026652000040100120048120048120048120048120048
602041200478990000200112003296712109736257010340102100012000030100100002000010426480573324434655100120023012007512004911213531124936010030200200001000060200200001000012004712004711502011009910040100100001000011002000002200000002000022000321011611119820400026652000040100120050120048120048120048120048
602041200478990000200112003296712109736257010340102100012000030100100002000010426395573324434655100120023012004712004711213531125056010030200200001000060200200001000012004712004711502011009910040100100001000001002000002200000002000022000321011611119820400026602000040100120048120048120048120048120048

1000 unrolls and 10 iterations

Result (median cycles for code, minus 3 chain cycles): 9.0051

retire (01)cycle (02)03080e0f191e1f22233f4d4f51inst issue (52)~issue int (53)~issue fp/simd (54)~issue ld/st (55)~dispatch int (56)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map op fp/simd (7e)~map lookup int (7f)~map lookup ld/st (80)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst fp/simd load (98)inst ldst (9b)9d9fa0a1a3a6a8acafb5dcache load miss (bf)dtlb miss (c1)c2c5cfd5d6dadbddinst fetch restart (de)e0? int output thing (e9)eaebecld/st retires (ed)gpr retires (ef)f5f6f7f8fd
60025120051899010020001200369664110974025700134001210000200003001010000200001042589657337243465524012002712005112003511214631125216001030020200001000060020200001003412005712005111500211091040010100001000001020003322000210200002200031401016006211982640002102492000040010120052120052120052120052120052
600241200518990000201012003696643109740257001340012100012000030010100002000010425374573367634653500120027120051120098112166311253160010301182000010000600202000010000120096120087115002110910400101000010000010200000220000002000022000314021601331198264000010002000040010120036120052120052120052120052
600241200518990000201012002096641109740257001340012100012000030010100002000010425374573343634653500120027120051120051112162311253160010300202000010000600202000010000120051120035115002110910400101000010000010200000220000002000000000314061601421198304000001092000040010120053120052120052120052120537
600241200359000000001012003996641109724257001340010100012000030010100002000010425374573343634653500120027120053120051112162311253160010300202000010000600202000010000120051120051115002110910400101000010000010200000220000002000022000314061601331198264000210092000040010120052120052120052120052120052
6002412005189900002000120020966411097402570013400121000120000300101000020000104253745733436346488001200271200351200511121623112531600103002020000100006002020064100001200511200811150021109104001010000100000102000002200000020000020003140616013211982640002101002000040010120052120036120052120052120052
6002412005190000002010120036966411097402570013400121000020000300101000020000104239745733436346535001200271200511200511121623112531600103002020000100006002020000100001200511200511150021109104001010000100001102000000200000020000220003140216012611982640002101092000040010120038120053120053120036120052
6002412005189900002010120036966411097402570013400121000120000300101000020000104253745732666346535001200271200511200511121623112531600103002020000100006002020000100001200511200511150021109104001010000100001102000000200000020000220003140316017711981040002101092000040010120052120052120052120052120052
600241200518990000200012003696642109858257001040012100012000030010100002000010425374573343634653500120027120035120051112146311253160010300202000010000600202000010000120051120051115002110910400101000010000110200000220000032000022000314021601421198264000201092000040010120052120036120052120052120055
600241200518990010201012002096641109724257001340010100012000030010100002000010425374573343634653500120027120051120051112146311253160010300202000010000600202000010000120051120051115002110910400101000010000010200000220000002000022000314021601771198264000210092000040010120036120052120052120052120052
600241200519000000201012003696641109724257001040012100012000030010100002005010425374573343634653500120027120051120051112162311253160010300202000010000600202006810000120051120035115002110910400101000010000110200000220000002000022000314021601661198264000201092000040010120052120036120052120052120052

Test 3: Latency 2->3 roundtrip

Chain cycles: 3

Code:

  ld1 { v0.16b, v1.16b }, [x6]
  fmov x1, d1
  eor x8, x8, x1
  eor x8, x8, x1
  add x6, x6, x8
  mov x0, 1
  mov x1, 2
  mov x8, 0

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code, minus 3 chain cycles): 9.0065

retire (01)cycle (02)0305080b0e0f18191e1f2223243f43494d4f51inst issue (52)~issue int (53)~issue fp/simd (54)~issue ld/st (55)~dispatch int (56)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)huge thing fp/simd (5b)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map op fp/simd (7e)~map lookup int (7f)~map lookup ld/st (80)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst fp/simd load (98)inst ldst (9b)9d9fa0a1a3a6a8a9acafb5bbdcache load miss (bf)dtlb miss (c1)c2cdcfd5d6ddinst fetch restart (de)e0? int output thing (e9)eaebecld/st retires (ed)gpr retires (ef)f5f6f7f8fd
60205120065899001110040000120044229670810974825701064010410002200003010010000200001042743957338203465858112003512006112005911214731125176010030200200001000060200200001000012005912005911502011009910040100100001000011002000224200040042000224220032101161111981640004101092000040100120060120060120044120060120060
60204120059899011110040000120050229673010975425701064010610003200003010010000200001042796157341083467721112004312006712006511215331125236010030200200001000060200200001000012006512006511502011009910040100100001000001002000334200040172000224220032101161111992040006101002000040100120066120066120066120066120066
60204120067899100000040000120050229671410973825701094010610003200003010010000200001042796157341083466032112004112006512006511215331125236010030200200001000060200200001000012006512006511502011009910040100100001000001002000244200050042000224220032101161111983840006101092000040100120066120066120066120066120066
6020412006589910100006264100120050229673010975425701094010610002200003010010000202001042822257341083466572112004112006512006611215331125236010030200200001000060200200001000012006812006511502011009910040100100001000001002000344200050142000224020032101161111983840004101002000040100120066120050120066120050120066
60204120065899100000040000120044229670810994125701034010410002200003010010029200001042761057330523467660112004112006512006511215331125236010030200200001000060200200001000012006512006511502011009910040100100001000001002000320200050042000202200032101161111981640002101002000040100120044120060120060120044120060
60204120059899000110016000012002822967241097512570106401141000220000301001000020000104274395733820346603211200411200491200491121533112523601003020020000100006020020000100001200651200651150201100991004010010000100000100200022020004004200022220203210116111201444000401092000040100120060120060120060120060120060
60204120043899000110440000120050209673210976325701094010610003200003010010000200001042804557341083468063112004112006512006511215331125236010030200200001000060200200001000012006512006511502011009910040100100001000001002000324200040142000224020032101161111983840015101082000040100120066120066120050120066120066
60204120065900121000016352000120455229673010975489701414012210003200003010010000201061046017457483303468472112004112039212006611215331125236010030200200001000060200200001000012006512006611502011009910040100100001000001002000254200050142006424221032101161111983840006101092000040100120066120066120066120050120067
6020412004990011000004000012005022967301097542570109401061000320000301001000020000104279615734108346745711200411200651200651121533112523601003020020000100006020020000100001200651200661150201100991004010010000100000100200033420005014200022220003210116111198324000401092000040100120060120044120060120060120060
6020412005989900011005388000120028229672410974825701064010210002200003010010000200001042743957338203466032112002512006512006511215331125236010030200200001000060200200001000012004912004911502011009910040100100001000011002000234200050172000224222032101161111983840006101002000040100120050120050120066120066120066

1000 unrolls and 10 iterations

Result (median cycles for code, minus 3 chain cycles): 9.0053

retire (01)cycle (02)0305080b0e0f1e22233a3f4d4f51inst issue (52)~issue int (53)~issue fp/simd (54)~issue ld/st (55)~dispatch int (56)~dispatch fp/simd (57)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)huge thing fp/simd (5b)60696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map op fp/simd (7e)~map lookup int (7f)~map lookup ld/st (80)~map lookup fp/simd (81)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)inst b.cc (94)inst integer (97)inst fp/simd load (98)inst ldst (9b)9d9fa0a1a3a6a8a9acafb5bbdcache load miss (bf)dtlb miss (c1)c2c5branch mispredict (cb)cdcfd2d5d6dadbddinst fetch restart (de)e0? int output thing (e9)eaebecld/st retires (ed)gpr retires (ef)f5f6f7f8fd
6002512006089911101410212002696651109750257001640012100022000030010100002000010424504573372434655240120037012006112006111217231125216001030020200001000060020200001000012004112005711500211091040010100001000001020002222000300172000022220000314104160022119832400021410132000040010120062120062120062120062120062
6002412005890010100111021200269665210974925700134001210002200003001010000200001042589657339163465524112003701200411200611121523112541600103002020000100006002020000100001200611200571150021109104001010000100000102000420200020014200002222200031410216002211983240004141402000040010120042120042120058120058120058
60024120060899101004100120046966311097302570016400141000220000300101000020000104262445732956346506011200370120041120041112152311254160010300202000010000600202000010000120061120041115002110910400101000010000010200033220002002320000222200003141021600221198364000410002000040010120058120042120042120062120042
600241202469301100140001200469665110973025700134001410001200003001010000200001042450457329563465060112003701200571200611121723112521600103002020000100006002020000100001200611200571150021109104001010000100000102000342200030014200002222100031410216002211981640004140132000040010120062120062120042120058120042
6002412006189911000400012004296647109750257001640012100022000030010100002000010424504573295634650601120037012006112004111217231125826001030020200001000060020200001000012005712004111500211091040010100001000001020003422000300220000222210003141021600221198364000401002000040010120058120058120058120042120062
600241200609001100080021200469665110975025700164001210002200003001010000200001042624457339163465060112003701200611200611121523112521600103002020000100006002020000100001200411200571150021109104001010000100000102000332200030011200002202200031410216002211981640002141402000040010120062120058120058120058120058
60024120058899101004101120026966431097422570016400221000220000300101003120000104258965732956346540811200330120057120057112168311252160010300202000010000600202000010000120057120053115002110910400101000010000010200022020003001420000022210003141021600221198164000410692000040010120042120042120058120054120042
600241200988991111020021200429664310974225700164001210002200003001010000200001042450457337243465408112001701200411200411121683112521600103002020000100006002020000100001200571200531150021109104001010000100000102000222200020082000022221001314102160022119828400046602000040010120054120042120042120042120042
6002412005389910000600112004296631109730257001640014100022000030010100002000010425896573372434655241120017012005712005311215231125376001030020200001000060020200001000012004112005311500211091040010100001000001020005322000300520000222210003141021600221198284000410092000040010120058120058120058120042120058
6002412005390011000400212003896631109746257001340014100022000030010100002000010426148573353234650601120029012005712004111217131125336001030120200001000060020200001000012005712004111500221091040010100001000001020002322000301172000002220000314102160022119832400020692000040010120054120054120058120058120058

Test 4: throughput

Count: 8

Code:

  ld1 { v0.16b, v1.16b }, [x6]
  ld1 { v0.16b, v1.16b }, [x6]
  ld1 { v0.16b, v1.16b }, [x6]
  ld1 { v0.16b, v1.16b }, [x6]
  ld1 { v0.16b, v1.16b }, [x6]
  ld1 { v0.16b, v1.16b }, [x6]
  ld1 { v0.16b, v1.16b }, [x6]
  ld1 { v0.16b, v1.16b }, [x6]
  mov x7, x6
  mov x8, x6
  mov x9, x6
  mov x10, x6
  mov x11, x6
  mov x12, x6
  mov x13, x6

(fused SUBS/B.cc loop)

100 unrolls and 100 iterations

Result (median cycles for code divided by count): 0.6675

retire (01)cycle (02)0305080b0e0f1e22233a3f4346494f51inst issue (52)~issue int (53)~issue ld/st (55)~dispatch int (56)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)696b6d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map lookup int (7f)~map lookup ld/st (80)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)92inst b.cc (94)inst integer (97)inst fp/simd load (98)inst ldst (9b)9d9fa0a1a3a6a7a8a9acafb5b6bbdcache load miss (bf)dtlb miss (c1)c2cfd5d6ddinst fetch restart (de)e0eaebecld/st retires (ed)gpr retires (ef)f5f6f7f8fd
1602055340340011101103103533873070251601001001600001001600005002333373533780534145341733325333340160100200160000200160000533815338211802011009901001008000080000110016002020431600591006116004061584319051101161153379131351600001005340453404534035340353383
160204533814001010066102533882701925160100100160000100160000500233337353377353471534123332633336016010020016000020016000053382534021180201100990100100800008000001001600191943160019101611600400019431915110116115340013051600001005338353383534035338253382
16020453402400101002110153387390202516010010016000010016000050023336135337705347853410333053333611601002001600002001600005340253382118020110099010010080000800000100160019194316001900060160000011943190511011611534020051600001005340453382533825340353404
160204534024001000067100533672700251601001001600001001600005002328945533770535215341233325333339160100200160000200160000534025340311802011009901001008000080000010016002021431600580006116000000594319151101161153378131351600001005338253404534035340453404
1602045340340010000660025338707020251601001001600001001600005002334815533770534115341333326333340160100200160000200160000534025340311802011009901001008000080000010016001919431600191006016003960594319151101161153378131351600001005340353382534045340953403
16020453402400100003310353388007202516010010016000010016000050023336135335605355753424333353333601601002001600002001600005338253403118020110099010010080000800000100160020190160058100601600006161431915110116115337901351600001005340653403533835340753382
1602045338140010000211005338737019251601001001600001001600005002333613533780535445339733326333361160100200160000200160000533815338211802011009911001008000080000010016001920431600581016116004061594319051101161153399131351600001005340453382534035338253383
1602045340239911000671035336630720251601001001600001001600005002333613533770535305339233304333339160100200160000200160000534035338111802011009901001008000080000010016002020431600591012116004061584319251101161153380131351600001005338253383534045340353403
16020453402400111002110353366207025160100100160000100160000500232235553356053473534113330433333916010020016000020016000053403534021180201100990100100800008000001001600191901600601016116004061594319051101161153378131301600001005340453403533825340453404
160204534034001210121002533873072025160100100160000100160000500235558153378053542534133332533333916010020016000020016000053402534031180201100990100100800008000001001600201943160059001211600000119431905110116115339913001600001005340453403533825338253404

1000 unrolls and 10 iterations

Result (median cycles for code divided by count): 0.6675

retire (01)cycle (02)030508090b0e0f191e1f2223243a3f4346494f51inst issue (52)~issue int (53)~issue ld/st (55)~dispatch int (56)~dispatch ld/st (58)huge thing int (59)huge thing ld/st (5a)60696d6edispatch stall (70)scheduler rewind (75)scheduler stall (76)~dispatch op (78)~map op int (7c)~map op ld/st (7d)~map lookup int (7f)~map lookup ld/st (80)8283pipeline redirect (84)85inst all (8c)inst branch (8d)inst branch taken (90)92inst b.cc (94)inst integer (97)inst fp/simd load (98)inst ldst (9b)9d9fa0a1a3a5a6a7a8a9acafb5b6bbdcache load miss (bf)dtlb miss (c1)c2cficache miss (d3)d5d6ddinst fetch restart (de)e0eaebecld/st retires (ed)gpr retires (ef)f5f6f7f8fd
160025534044001111000153010035348030719251600101016000010160000502335008053377535575342133354333382160010201600002016000053402533811180021109010108000080000010160019194301600590016116004061594319150200616355337813135160000105340353382533825340353382
16002453402400111000066010025338830020251600101016000010160000502335781053356535095342133347333383160010201600002016000053381534021180021109010108000080000010160019214301600591006116004261594419150200316355339913135160000105340353403534035340353382
16002453402399111000067000015336637720251600101016000010160000502332997053377534975341633348333382160010201600002016000053381533811180021109010108000080000010160020204301600591006116004060584519150203616355339913135160000105340353403534035340453403
1600245340240010010003301002533883000331600101016000010160000502355367053377534815341733347333382160010201600002016000053381534021180021109010108000080000010160020214301600590012116004061594318150200516535339913135160000105340353404533825340353403
160024533814001011000660000353388377025160010101600001016000050232916705337753520533933334833338216001020160000201600005340253402118002110901010800008000001016001919430160059012211600396059431915020031665533990135160000105340353403534035340353403
1600245338140012100002101003533873772025160010101600001016000050232916715337753495534113334833338316001020160000201600005340253402118002110901010800008000001016001920430160058000601600006160431905020051653533780135160000105338253382534035340453403
1600245338140010010006700003533883771825160010101600001016000050233578105337753498534133332633338216001020160000201600005338153402118002110901010800008000001016002020430160019000611600006159431915020051654533780135160000105340353403534035338253382
160024534024001011000670100053388270192516001010160000101600005023346780533775354153414333483333821600102016000020160000534035340211800211091101080000800000101600192000160058102211600400059431915020051655533991305160000105340353383534035340353403
160024534024001001000660000353387277025160010101600001016000050233578105337753539534133334833338216001020160000201600005340253402118002110901010800008000001016002021430160059001211600006159431915020051655533990135160000105338253382534035340353382
1600245338140011111002100002533663072025160010101600001016000050232916705337753505534113334833336116001020160000201600005340253403118002110901010800008000001016001920430160059000611600400059431935020041653533781305160000105340353410534075339453382