SVE Instruction List by Dougall Johnson
ADR: Compute vector address
ADR Zd.D, [Zn.D, Zm.D, LSL #3] (SVE+NS
svuint64_t svadrd[_u64base]_[s64]index(svuint64_t bases, svint64_t indices)
svuint64_t svadrd[_u64base]_[u64]index(svuint64_t bases, svuint64_t indices)
128-bit SVE

For each 64-bit integer set (3) to (2) + (1) << 3.
256-bit SVE

For each 64-bit integer set (3) to (2) + (1) << 3.
512-bit SVE

For each 64-bit integer set (3) to (2) + (1) << 3.
Larger sizes
1024-bit SVE

For each 64-bit integer set (3) to (2) + (1) << 3.
2048-bit SVE

For each 64-bit integer set (3) to (2) + (1) << 3.
Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.