SVE Instruction List by Dougall Johnson
See "AESE (vectors)" in the exploration tools

AESE (vectors): AES single round encryption

AESE Zdn.B, Zdn.B, Zm.B (SVE2+AES+NS (SSVE-AES+AES
svuint8_t svaese[_u8](svuint8_t op1, svuint8_t op2)

128-bit SVE

For each 128-bit block, XOR (1) with the corresponding block from (2), then apply AES ShiftRows and SubBytes, writing the result to (3). This is one round of AES encryption without MixColumns (used for the final round).

256-bit SVE

For each 128-bit block, XOR (1) with the corresponding block from (2), then apply AES ShiftRows and SubBytes, writing the result to (3). This is one round of AES encryption without MixColumns (used for the final round).

512-bit SVE

For each 128-bit block, XOR (1) with the corresponding block from (2), then apply AES ShiftRows and SubBytes, writing the result to (3). This is one round of AES encryption without MixColumns (used for the final round).

Larger sizes

1024-bit SVE

For each 128-bit block, XOR (1) with the corresponding block from (2), then apply AES ShiftRows and SubBytes, writing the result to (3). This is one round of AES encryption without MixColumns (used for the final round).

2048-bit SVE

For each 128-bit block, XOR (1) with the corresponding block from (2), then apply AES ShiftRows and SubBytes, writing the result to (3). This is one round of AES encryption without MixColumns (used for the final round).

Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.