SVE Instruction List by Dougall Johnson
See "ASR (immediate, predicated)" in the exploration tools

ASR (immediate, predicated): Arithmetic shift right by immediate (predicated)

ASR Zdn.D, Pg/M, Zdn.D, #const (SVE (SME
svint64_t svasr[_n_s64]_m(svbool_t pg, svint64_t op1, uint64_t op2)

128-bit SVE

For each 64-bit signed integer set (2) to (1) >> const. The shift amount is limited to 1 ≤ const ≤ 64.

256-bit SVE

For each 64-bit signed integer set (2) to (1) >> const. The shift amount is limited to 1 ≤ const ≤ 64.

512-bit SVE

For each 64-bit signed integer set (2) to (1) >> const. The shift amount is limited to 1 ≤ const ≤ 64.
Larger sizes

1024-bit SVE

For each 64-bit signed integer set (2) to (1) >> const. The shift amount is limited to 1 ≤ const ≤ 64.

2048-bit SVE

For each 64-bit signed integer set (2) to (1) >> const. The shift amount is limited to 1 ≤ const ≤ 64.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.