SVE Instruction List by Dougall Johnson
# ASR (wide elements, predicated): Arithmetic shift right by 64-bit wide elements (predicated)

ASR Zdn.B, Pg/M, Zdn.B, Zm.D (SVE (SME

svint8_t svasr_wide[_s8]_m(svbool_t pg, svint8_t op1, svuint64_t op2)

## 128-bit SVE

For each 8-bit signed integer set (3) to (2) shifted right by the corresponding 64-bit value from (1). If the shift amount from (1) is greater than 7 or less than 0, every bit of the result is set to the sign bit of (2).

## 256-bit SVE

For each 8-bit signed integer set (3) to (2) shifted right by the corresponding 64-bit value from (1). If the shift amount from (1) is greater than 7 or less than 0, every bit of the result is set to the sign bit of (2).

## 512-bit SVE

For each 8-bit signed integer set (3) to (2) shifted right by the corresponding 64-bit value from (1). If the shift amount from (1) is greater than 7 or less than 0, every bit of the result is set to the sign bit of (2).

## Larger sizes

## 1024-bit SVE

For each 8-bit signed integer set (3) to (2) shifted right by the corresponding 64-bit value from (1). If the shift amount from (1) is greater than 7 or less than 0, every bit of the result is set to the sign bit of (2).

## 2048-bit SVE

For each 8-bit signed integer set (3) to (2) shifted right by the corresponding 64-bit value from (1). If the shift amount from (1) is greater than 7 or less than 0, every bit of the result is set to the sign bit of (2).

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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.