BFCVT: Floating-point down convert to BFloat16 format (predicated)

BFCVT Zd.H, Pg/M, Zn.S (SVE+BF16 (SME+BF16

svbfloat16_t svcvt_bf16[_f32]_m(svbfloat16_t inactive, svbool_t pg, svfloat32_t op)

128-bit SVE

Convert each 32-bit float from (1) to a BFloat16, writing the results to the even 16-bit lanes of (2), zeroing odd lanes. The current rounding mode selected by FPCR is used.

256-bit SVE

Convert each 32-bit float from (1) to a BFloat16, writing the results to the even 16-bit lanes of (2), zeroing odd lanes. The current rounding mode selected by FPCR is used.

512-bit SVE

Convert each 32-bit float from (1) to a BFloat16, writing the results to the even 16-bit lanes of (2), zeroing odd lanes. The current rounding mode selected by FPCR is used.

Larger sizes

1024-bit SVE

Convert each 32-bit float from (1) to a BFloat16, writing the results to the even 16-bit lanes of (2), zeroing odd lanes. The current rounding mode selected by FPCR is used.

2048-bit SVE

Convert each 32-bit float from (1) to a BFloat16, writing the results to the even 16-bit lanes of (2), zeroing odd lanes. The current rounding mode selected by FPCR is used.

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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.