SVE Instruction List by Dougall Johnson
BFCVTN: BFloat16 convert to interleaved 8-bit floating-point
BFCVTN Zd.B, { Zn1.H, Zn2.H } (SVE2+FP8+NS (SME2+FP8
128-bit SVE
Convert each BFloat16 element from the pair of source registers (1) and (2) to an 8-bit float, interleaving the results into (3): even bytes from (1), odd bytes from (2). The FP8 format is selected by FPMR.
256-bit SVE
Convert each BFloat16 element from the pair of source registers (1) and (2) to an 8-bit float, interleaving the results into (3): even bytes from (1), odd bytes from (2). The FP8 format is selected by FPMR.
512-bit SVE
Convert each BFloat16 element from the pair of source registers (1) and (2) to an 8-bit float, interleaving the results into (3): even bytes from (1), odd bytes from (2). The FP8 format is selected by FPMR.
Larger sizes
1024-bit SVE
Convert each BFloat16 element from the pair of source registers (1) and (2) to an 8-bit float, interleaving the results into (3): even bytes from (1), odd bytes from (2). The FP8 format is selected by FPMR.
2048-bit SVE
Convert each BFloat16 element from the pair of source registers (1) and (2) to an 8-bit float, interleaving the results into (3): even bytes from (1), odd bytes from (2). The FP8 format is selected by FPMR.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.