SVE Instruction List by Dougall Johnson
BFMUL (indexed): BFloat16 floating-point multiply vectors by indexed elements
BFMUL Zd.H, Zn.H, Zm.H[imm] (SVE2+B16B16 (SME2+B16B16
128-bit SVE
Within each 128-bit segment, for each BFloat16 set (3) to (2) multiplied by the element from (1) specified by imm.
256-bit SVE
Within each 128-bit segment, for each BFloat16 set (3) to (2) multiplied by the element from (1) specified by imm.
512-bit SVE
Within each 128-bit segment, for each BFloat16 set (3) to (2) multiplied by the element from (1) specified by imm.
Larger sizes
1024-bit SVE
Within each 128-bit segment, for each BFloat16 set (3) to (2) multiplied by the element from (1) specified by imm.
2048-bit SVE
Within each 128-bit segment, for each BFloat16 set (3) to (2) multiplied by the element from (1) specified by imm.
Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.