COMPACT: Shuffle active elements of vector to the right and fill with zero

COMPACT Zd.S, Pg, Zn.S (SVE+NS

svfloat32_t svcompact[_f32](svbool_t pg, svfloat32_t op)

svint32_t svcompact[_s32](svbool_t pg, svint32_t op)

svuint32_t svcompact[_u32](svbool_t pg, svuint32_t op)

128-bit SVE

Select the 32-bit lanes from (1) where the corresponding predicate bit in (2) is set, and pack them into low lanes of (3), preserving their order, zeroing any high lanes.

256-bit SVE

Select the 32-bit lanes from (1) where the corresponding predicate bit in (2) is set, and pack them into low lanes of (3), preserving their order, zeroing any high lanes.

512-bit SVE

Select the 32-bit lanes from (1) where the corresponding predicate bit in (2) is set, and pack them into low lanes of (3), preserving their order, zeroing any high lanes.

Larger sizes

1024-bit SVE

Select the 32-bit lanes from (1) where the corresponding predicate bit in (2) is set, and pack them into low lanes of (3), preserving their order, zeroing any high lanes.

2048-bit SVE

Select the 32-bit lanes from (1) where the corresponding predicate bit in (2) is set, and pack them into low lanes of (3), preserving their order, zeroing any high lanes.

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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.