SVE Instruction List by Dougall Johnson
See "EOR3" in the exploration tools

EOR3: Bitwise exclusive OR of three vectors

EOR3 Zdn.D, Zdn.D, Zm.D, Zk.D (SVE2 (SME
svint8_t sveor3[_s8](svint8_t op1, svint8_t op2, svint8_t op3)
svint16_t sveor3[_s16](svint16_t op1, svint16_t op2, svint16_t op3)
svint32_t sveor3[_s32](svint32_t op1, svint32_t op2, svint32_t op3)
svint64_t sveor3[_s64](svint64_t op1, svint64_t op2, svint64_t op3)
svuint8_t sveor3[_u8](svuint8_t op1, svuint8_t op2, svuint8_t op3)
svuint16_t sveor3[_u16](svuint16_t op1, svuint16_t op2, svuint16_t op3)
svuint32_t sveor3[_u32](svuint32_t op1, svuint32_t op2, svuint32_t op3)
svuint64_t sveor3[_u64](svuint64_t op1, svuint64_t op2, svuint64_t op3)

128-bit SVE

For each bit set (4) to (1) ^ (2) ^ (3).

256-bit SVE

For each bit set (4) to (1) ^ (2) ^ (3).

512-bit SVE

For each bit set (4) to (1) ^ (2) ^ (3).
Larger sizes

1024-bit SVE

For each bit set (4) to (1) ^ (2) ^ (3).

2048-bit SVE

For each bit set (4) to (1) ^ (2) ^ (3).
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.