SVE Instruction List
by
Dougall Johnson
See "FCMLA (vectors)" in the exploration tools
FCMLA (vectors): Floating-point complex multiply-add with 180° rotate (predicated)
FCMLA Zda.H, Pg/M, Zn.H, Zm.H, #180
(SVE
(SME
svfloat16_t svcmla[_f16]_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3, 180)
128-bit SVE
For each signed 16-bit float, set (4) as shown. See
the documentation
for more information.
256-bit SVE
For each signed 16-bit float, set (4) as shown. See
the documentation
for more information.
512-bit SVE
For each signed 16-bit float, set (4) as shown. See
the documentation
for more information.
Larger sizes
1024-bit SVE
For each signed 16-bit float, set (4) as shown. See
the documentation
for more information.
2048-bit SVE
For each signed 16-bit float, set (4) as shown. See
the documentation
for more information.
Report mistakes or give feedback
Inspired by and based on the
x86/x64 SIMD Instruction List
by Daytime.
