SVE Instruction List
by
Dougall Johnson
See "FCMLA (vectors)" in the exploration tools
FCMLA (vectors): Floating-point complex multiply-add with 180° rotate (predicated)
FCMLA Zda.D, Pg/M, Zn.D, Zm.D, #180
(SVE
(SME
svfloat64_t svcmla[_f64]_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3, 180)
128-bit SVE
For each signed 64-bit float, set (4) as shown. See
the documentation
for more information.
256-bit SVE
For each signed 64-bit float, set (4) as shown. See
the documentation
for more information.
512-bit SVE
For each signed 64-bit float, set (4) as shown. See
the documentation
for more information.
Larger sizes
1024-bit SVE
For each signed 64-bit float, set (4) as shown. See
the documentation
for more information.
2048-bit SVE
For each signed 64-bit float, set (4) as shown. See
the documentation
for more information.
Report mistakes or give feedback
Inspired by and based on the
x86/x64 SIMD Instruction List
by Daytime.
