FCVT: Floating-point convert precision (predicated)

FCVT Zd.H, Pg/M, Zn.D (SVE (SME

svfloat16_t svcvt_f16[_f64]_m(svfloat16_t inactive, svbool_t pg, svfloat64_t op)

128-bit SVE

Convert each 64-bit float from (1) to a 16-bit float, writing the results to the lowest overlapping 16-bit lanes of (2), and zeroing other lanes. The current rounding mode selected by FPCR is used.

256-bit SVE

Convert each 64-bit float from (1) to a 16-bit float, writing the results to the lowest overlapping 16-bit lanes of (2), and zeroing other lanes. The current rounding mode selected by FPCR is used.

512-bit SVE

Convert each 64-bit float from (1) to a 16-bit float, writing the results to the lowest overlapping 16-bit lanes of (2), and zeroing other lanes. The current rounding mode selected by FPCR is used.

Larger sizes

1024-bit SVE

Convert each 64-bit float from (1) to a 16-bit float, writing the results to the lowest overlapping 16-bit lanes of (2), and zeroing other lanes. The current rounding mode selected by FPCR is used.

2048-bit SVE

Convert each 64-bit float from (1) to a 16-bit float, writing the results to the lowest overlapping 16-bit lanes of (2), and zeroing other lanes. The current rounding mode selected by FPCR is used.

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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.