FCVTNT: Floating-point down convert and narrow (top, predicated)

FCVTNT Zd.S, Pg/M, Zn.D (SVE2 (SME

svfloat32_t svcvtnt_f32[_f64]_m(svfloat32_t even, svbool_t pg, svfloat64_t op)

128-bit SVE

Convert each 64-bit float from (1) to a 32-bit float, writing the results to the odd lanes of (3), preserving the even lanes from (2). The current rounding mode selected by FPCR is used.

256-bit SVE

Convert each 64-bit float from (1) to a 32-bit float, writing the results to the odd lanes of (3), preserving the even lanes from (2). The current rounding mode selected by FPCR is used.

512-bit SVE

Convert each 64-bit float from (1) to a 32-bit float, writing the results to the odd lanes of (3), preserving the even lanes from (2). The current rounding mode selected by FPCR is used.

Larger sizes

1024-bit SVE

Convert each 64-bit float from (1) to a 32-bit float, writing the results to the odd lanes of (3), preserving the even lanes from (2). The current rounding mode selected by FPCR is used.

2048-bit SVE

Convert each 64-bit float from (1) to a 32-bit float, writing the results to the odd lanes of (3), preserving the even lanes from (2). The current rounding mode selected by FPCR is used.

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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.