SVE Instruction List by Dougall Johnson
FCVTX: Double-precision convert to single-precision, rounding to odd (predicated)
FCVTX Zd.S, Pg/Z, Zn.D (SVE2.2 (SME2.2
128-bit SVE
Convert each 64-bit float from (1) to a 32-bit float, rounding to odd, writing the results to the even lanes of (2), zeroing the odd lanes.
256-bit SVE
Convert each 64-bit float from (1) to a 32-bit float, rounding to odd, writing the results to the even lanes of (2), zeroing the odd lanes.
512-bit SVE
Convert each 64-bit float from (1) to a 32-bit float, rounding to odd, writing the results to the even lanes of (2), zeroing the odd lanes.
Larger sizes
1024-bit SVE
Convert each 64-bit float from (1) to a 32-bit float, rounding to odd, writing the results to the even lanes of (2), zeroing the odd lanes.
2048-bit SVE
Convert each 64-bit float from (1) to a 32-bit float, rounding to odd, writing the results to the even lanes of (2), zeroing the odd lanes.
Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.