FCVTXNT: Double-precision convert to single-precision, rounding to odd (top, predicated)

FCVTXNT Zd.S, Pg/Z, Zn.D (SVE2.2 (SME2.2

128-bit SVE

Convert each 64-bit float from (1) to a 32-bit float, rounding to odd, writing the results to the odd lanes of (3), preserving the even lanes from (2)

256-bit SVE

Convert each 64-bit float from (1) to a 32-bit float, rounding to odd, writing the results to the odd lanes of (3), preserving the even lanes from (2)

512-bit SVE

Convert each 64-bit float from (1) to a 32-bit float, rounding to odd, writing the results to the odd lanes of (3), preserving the even lanes from (2)

Larger sizes

1024-bit SVE

Convert each 64-bit float from (1) to a 32-bit float, rounding to odd, writing the results to the odd lanes of (3), preserving the even lanes from (2)

2048-bit SVE

Convert each 64-bit float from (1) to a 32-bit float, rounding to odd, writing the results to the odd lanes of (3), preserving the even lanes from (2)

Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.