SVE Instruction List by Dougall Johnson
See "FCVTZSN" in the exploration tools

FCVTZSN: Floating-point narrowing convert to interleaved signed integer, rounding toward zero

FCVTZSN Zd.H, { Zn1.S, Zn2.S } (SVE2.3 (SME2.3

128-bit SVE

Convert each 32-bit float from (1) and (2) to a 16-bit signed integer, rounding toward zero. Set the even 16-bit elements of (3) to the results from (1), and the odd 16-bit elements of (3) to the results from (2).

256-bit SVE

Convert each 32-bit float from (1) and (2) to a 16-bit signed integer, rounding toward zero. Set the even 16-bit elements of (3) to the results from (1), and the odd 16-bit elements of (3) to the results from (2).

512-bit SVE

Convert each 32-bit float from (1) and (2) to a 16-bit signed integer, rounding toward zero. Set the even 16-bit elements of (3) to the results from (1), and the odd 16-bit elements of (3) to the results from (2).

Larger sizes

1024-bit SVE

Convert each 32-bit float from (1) and (2) to a 16-bit signed integer, rounding toward zero. Set the even 16-bit elements of (3) to the results from (1), and the odd 16-bit elements of (3) to the results from (2).

2048-bit SVE

Convert each 32-bit float from (1) and (2) to a 16-bit signed integer, rounding toward zero. Set the even 16-bit elements of (3) to the results from (1), and the odd 16-bit elements of (3) to the results from (2).

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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.