SVE Instruction List by Dougall Johnson
FDIVR: Floating-point reversed divide by vector (predicated)
FDIVR Zdn.H, Pg/M, Zdn.H, Zm.H (SVE (SME
svfloat16_t svdivr[_f16]_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2)
128-bit SVE
For each 16-bit float set (3) to (2) / (1).
256-bit SVE
For each 16-bit float set (3) to (2) / (1).
512-bit SVE
For each 16-bit float set (3) to (2) / (1).
Larger sizes
1024-bit SVE
For each 16-bit float set (3) to (2) / (1).
2048-bit SVE
For each 16-bit float set (3) to (2) / (1).
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.