SVE Instruction List by Dougall Johnson
FDIVR: Floating-point reversed divide by vector (predicated)
FDIVR Zdn.D, Pg/M, Zdn.D, Zm.D (SVE (SME
svfloat64_t svdivr[_f64]_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2)
128-bit SVE
For each 64-bit float set (3) to (2) / (1).
256-bit SVE
For each 64-bit float set (3) to (2) / (1).
512-bit SVE
For each 64-bit float set (3) to (2) / (1).
Larger sizes
1024-bit SVE
For each 64-bit float set (3) to (2) / (1).
2048-bit SVE
For each 64-bit float set (3) to (2) / (1).
Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.