SVE Instruction List by Dougall Johnson
FMAD: Floating-point fused multiply-add vectors (predicated), writing multiplicand [Zdn = Za + Zdn * Zm]
FMAD Zdn.S, Pg/M, Zm.S, Za.S (SVE (SME
svfloat32_t svmad[_f32]_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3)
128-bit SVE
For each 32-bit float set (4) to (3) + (1) * (2).
256-bit SVE
For each 32-bit float set (4) to (3) + (1) * (2).
512-bit SVE
For each 32-bit float set (4) to (3) + (1) * (2).
Larger sizes
1024-bit SVE
For each 32-bit float set (4) to (3) + (1) * (2).
2048-bit SVE
For each 32-bit float set (4) to (3) + (1) * (2).
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.