SVE Instruction List by Dougall Johnson
FMAXNMQV: Floating-point maximum number recursive reduction of quadword vector segments
FMAXNMQV Vd.4S, Pg, Zn.S (SVE2.1 (SME2.1
128-bit SVE
Take the maximum number (i.e. non-QNaN) across corresponding active 32-bit float elements from each 128-bit segment of (1), storing the result in (3). For any element where the corresponding predicate bit in (2) is 0, interpret it as QNaN.
256-bit SVE
Take the maximum number (i.e. non-QNaN) across corresponding active 32-bit float elements from each 128-bit segment of (1), storing the result in (3). For any element where the corresponding predicate bit in (2) is 0, interpret it as QNaN.
512-bit SVE
Take the maximum number (i.e. non-QNaN) across corresponding active 32-bit float elements from each 128-bit segment of (1), storing the result in (3). For any element where the corresponding predicate bit in (2) is 0, interpret it as QNaN.
Larger sizes
1024-bit SVE
Take the maximum number (i.e. non-QNaN) across corresponding active 32-bit float elements from each 128-bit segment of (1), storing the result in (3). For any element where the corresponding predicate bit in (2) is 0, interpret it as QNaN.
2048-bit SVE
Take the maximum number (i.e. non-QNaN) across corresponding active 32-bit float elements from each 128-bit segment of (1), storing the result in (3). For any element where the corresponding predicate bit in (2) is 0, interpret it as QNaN.
Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.