SVE Instruction List by Dougall Johnson
FMLS (indexed): Floating-point fused multiply-subtract by indexed elements (Zda = Zda + -Zn * Zm[indexed])
FMLS Zda.S, Zn.S, Zm.S[imm] (SVE (SME
svfloat32_t svmls_lane[_f32](svfloat32_t op1, svfloat32_t op2, svfloat32_t op3, uint64_t imm_index)
128-bit SVE
Within each 128-bit segment, for each 32-bit float, set (4) to the element from (1) specified by imm, multiplied by (2), minus (3).
256-bit SVE
Within each 128-bit segment, for each 32-bit float, set (4) to the element from (1) specified by imm, multiplied by (2), minus (3).
512-bit SVE
Within each 128-bit segment, for each 32-bit float, set (4) to the element from (1) specified by imm, multiplied by (2), minus (3).
Larger sizes
1024-bit SVE
Within each 128-bit segment, for each 32-bit float, set (4) to the element from (1) specified by imm, multiplied by (2), minus (3).
2048-bit SVE
Within each 128-bit segment, for each 32-bit float, set (4) to the element from (1) specified by imm, multiplied by (2), minus (3).
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.