See "FMLSLB (indexed)" in the exploration tools

FMLSLB (indexed): Half-precision floating-point multiply-subtract long from single-precision (bottom, indexed)

FMLSLB Zda.S, Zn.H, Zm.H[imm] (SVE2 (SME

svfloat32_t svmlslb_lane[_f32](svfloat32_t op1, svfloat16_t op2, svfloat16_t op3, uint64_t imm_index)

128-bit SVE

Multiply each even 16-bit float from (2), with the 16-bit float specified by imm from (1), then subtract this from the 32-bit float from (3), and set (4) to the result.

256-bit SVE

Multiply each even 16-bit float from (2), with the 16-bit float specified by imm from (1), then subtract this from the 32-bit float from (3), and set (4) to the result.

512-bit SVE

Multiply each even 16-bit float from (2), with the 16-bit float specified by imm from (1), then subtract this from the 32-bit float from (3), and set (4) to the result.

Larger sizes

1024-bit SVE

Multiply each even 16-bit float from (2), with the 16-bit float specified by imm from (1), then subtract this from the 32-bit float from (3), and set (4) to the result.

2048-bit SVE

Multiply each even 16-bit float from (2), with the 16-bit float specified by imm from (1), then subtract this from the 32-bit float from (3), and set (4) to the result.

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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.