SVE Instruction List by Dougall Johnson
FMUL (indexed): Floating-point multiply by indexed elements
FMUL Zd.H, Zn.H, Zm.H[imm] (SVE (SME
svfloat16_t svmul_lane[_f16](svfloat16_t op1, svfloat16_t op2, uint64_t imm_index)
128-bit SVE
Within each 128-bit segment, for each 16-bit float set (3) to (2) multiplied by the element from (1) specified by imm.
256-bit SVE
Within each 128-bit segment, for each 16-bit float set (3) to (2) multiplied by the element from (1) specified by imm.
512-bit SVE
Within each 128-bit segment, for each 16-bit float set (3) to (2) multiplied by the element from (1) specified by imm.
Larger sizes
1024-bit SVE
Within each 128-bit segment, for each 16-bit float set (3) to (2) multiplied by the element from (1) specified by imm.
2048-bit SVE
Within each 128-bit segment, for each 16-bit float set (3) to (2) multiplied by the element from (1) specified by imm.
Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.