SVE Instruction List by Dougall Johnson
FNEG: Floating-point negate (predicated)
FNEG Zd.H, Pg/Z, Zn.H (SVE2.2 (SME2.2
128-bit SVE
For each 16-bit float set (2) to −(1).
256-bit SVE
For each 16-bit float set (2) to −(1).
512-bit SVE
For each 16-bit float set (2) to −(1).
Larger sizes
1024-bit SVE
For each 16-bit float set (2) to −(1).
2048-bit SVE
For each 16-bit float set (2) to −(1).
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.