SVE Instruction List by Dougall Johnson
FNMLS: Floating-point negated fused multiply-subtract vectors (predicated), writing addend [Zda = -Zda + Zn * Zm]
FNMLS Zda.H, Pg/M, Zn.H, Zm.H (SVE (SME
svfloat16_t svnmls[_f16]_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3)
128-bit SVE
For each 16-bit float set (4) to −(1) + (2) * (3).
256-bit SVE
For each 16-bit float set (4) to −(1) + (2) * (3).
512-bit SVE
For each 16-bit float set (4) to −(1) + (2) * (3).
Larger sizes
1024-bit SVE
For each 16-bit float set (4) to −(1) + (2) * (3).
2048-bit SVE
For each 16-bit float set (4) to −(1) + (2) * (3).
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.