SVE Instruction List by Dougall Johnson
FRINTI: Floating-point round to integral value (predicated)
FRINTI Zd.D, Pg/M, Zn.D (SVE (SME
svfloat64_t svrinti[_f64]_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op)
128-bit SVE
For each 64-bit float round (1) to an integral floating-point value, and set (2) to the result. The current rounding mode selected by FPCR is used.
256-bit SVE
For each 64-bit float round (1) to an integral floating-point value, and set (2) to the result. The current rounding mode selected by FPCR is used.
512-bit SVE
For each 64-bit float round (1) to an integral floating-point value, and set (2) to the result. The current rounding mode selected by FPCR is used.
Larger sizes
1024-bit SVE
For each 64-bit float round (1) to an integral floating-point value, and set (2) to the result. The current rounding mode selected by FPCR is used.
2048-bit SVE
For each 64-bit float round (1) to an integral floating-point value, and set (2) to the result. The current rounding mode selected by FPCR is used.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.