SVE Instruction List by Dougall Johnson
FSCALE: Floating-point adjust exponent by vector (predicated)
FSCALE Zdn.H, Pg/M, Zdn.H, Zm.H (SVE (SME
svfloat16_t svscale[_f16]_m(svbool_t pg, svfloat16_t op1, svint16_t op2)
128-bit SVE
For each 16-bit float from (1) and 16-bit signed integer from (2), set (3) to (1) * 2.0(2) as a 16-bit float.
256-bit SVE
For each 16-bit float from (1) and 16-bit signed integer from (2), set (3) to (1) * 2.0(2) as a 16-bit float.
512-bit SVE
For each 16-bit float from (1) and 16-bit signed integer from (2), set (3) to (1) * 2.0(2) as a 16-bit float.
Larger sizes
1024-bit SVE
For each 16-bit float from (1) and 16-bit signed integer from (2), set (3) to (1) * 2.0(2) as a 16-bit float.
2048-bit SVE
For each 16-bit float from (1) and 16-bit signed integer from (2), set (3) to (1) * 2.0(2) as a 16-bit float.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.