INSR (scalar): Insert general-purpose register in shifted vector

INSR Zdn.S, Wm (SVE (SME

svfloat32_t svinsr[_n_f32](svfloat32_t op1, float32_t op2)

svint32_t svinsr[_n_s32](svint32_t op1, int32_t op2)

svuint32_t svinsr[_n_u32](svuint32_t op1, uint32_t op2)

128-bit SVE

Shift the 32-bit lanes from (1) left by one element, inserting (2) into lane 0, and setting (3) to the result.

Shift the 32-bit lanes from (1) left by one element, inserting (2) into lane 0, and setting (3) to the result.

Shift the 32-bit lanes from (1) left by one element, inserting (2) into lane 0, and setting (3) to the result.

Larger sizes

Shift the 32-bit lanes from (1) left by one element, inserting (2) into lane 0, and setting (3) to the result.

Shift the 32-bit lanes from (1) left by one element, inserting (2) into lane 0, and setting (3) to the result.