SVE Instruction List by Dougall Johnson
LASTA (SIMD&FP scalar): Extract element after last to SIMD&FP scalar register
LASTA Dd, Pg, Zn.D (SVE (SME
float64_t svlasta[_f64](svbool_t pg, svfloat64_t op)
int64_t svlasta[_s64](svbool_t pg, svint64_t op)
uint64_t svlasta[_u64](svbool_t pg, svuint64_t op)
128-bit SVE
Find the last (leftmost) 64-bit element from (2) where the corresponding predicate bit in (1) is non-zero, then set (3) to the next element. If all corresponding predicate bits are zero, or the last corresponding predicate bit is non-zero, set (3) to the first (rightmost) element from (1).
256-bit SVE
Find the last (leftmost) 64-bit element from (2) where the corresponding predicate bit in (1) is non-zero, then set (3) to the next element. If all corresponding predicate bits are zero, or the last corresponding predicate bit is non-zero, set (3) to the first (rightmost) element from (1).
512-bit SVE
Find the last (leftmost) 64-bit element from (2) where the corresponding predicate bit in (1) is non-zero, then set (3) to the next element. If all corresponding predicate bits are zero, or the last corresponding predicate bit is non-zero, set (3) to the first (rightmost) element from (1).
Larger sizes
1024-bit SVE
Find the last (leftmost) 64-bit element from (2) where the corresponding predicate bit in (1) is non-zero, then set (3) to the next element. If all corresponding predicate bits are zero, or the last corresponding predicate bit is non-zero, set (3) to the first (rightmost) element from (1).
2048-bit SVE
Find the last (leftmost) 64-bit element from (2) where the corresponding predicate bit in (1) is non-zero, then set (3) to the next element. If all corresponding predicate bits are zero, or the last corresponding predicate bit is non-zero, set (3) to the first (rightmost) element from (1).
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.