SVE Instruction List by Dougall Johnson
LD1H (vector plus immediate): Gather load unsigned halfwords to vector (immediate index)
LD1H { Zt.D }, Pg/Z, [Zn.D, #imm] (SVE+NS
svint64_t svld1uh_gather[_u64base]_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset)
svuint64_t svld1uh_gather[_u64base]_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset)
128-bit SVE
Gather (load) and zero extend 16-bit values into the 64-bit elements of (3), from the corresponding 64-bit address from (2), plus an immediate. If the predicate bit from (1) corresponding to an element in (3) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The immediate offset is limited to 0 ≤ imm < 64, and must be divisible by two.
256-bit SVE
Gather (load) and zero extend 16-bit values into the 64-bit elements of (3), from the corresponding 64-bit address from (2), plus an immediate. If the predicate bit from (1) corresponding to an element in (3) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The immediate offset is limited to 0 ≤ imm < 64, and must be divisible by two.
512-bit SVE
Gather (load) and zero extend 16-bit values into the 64-bit elements of (3), from the corresponding 64-bit address from (2), plus an immediate. If the predicate bit from (1) corresponding to an element in (3) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The immediate offset is limited to 0 ≤ imm < 64, and must be divisible by two.
Larger sizes
1024-bit SVE
Gather (load) and zero extend 16-bit values into the 64-bit elements of (3), from the corresponding 64-bit address from (2), plus an immediate. If the predicate bit from (1) corresponding to an element in (3) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The immediate offset is limited to 0 ≤ imm < 64, and must be divisible by two.
2048-bit SVE
Gather (load) and zero extend 16-bit values into the 64-bit elements of (3), from the corresponding 64-bit address from (2), plus an immediate. If the predicate bit from (1) corresponding to an element in (3) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The immediate offset is limited to 0 ≤ imm < 64, and must be divisible by two.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.