SVE Instruction List by Dougall Johnson
# LD1ROB (scalar plus scalar): Contiguous load and replicate thirty-two bytes (scalar index)

LD1ROB { Zt.B }, Pg/Z, [Xn, Xm] (SVE+F64MM+NS

svint8_t svld1ro[_s8](svbool_t pg, const int8_t *base)

svuint8_t svld1ro[_u8](svbool_t pg, const uint8_t *base)

## 128-bit SVE

This operation is undefined for 128-bit SVE.

## 256-bit SVE

Load each 8-bit element in the low 256-bit segment of (3) from the memory operand (2), or zero the element if the corresponding predicate bit in (1) is zero, then replicate that 128-bit segment to fill the register, ignoring the predicate. If the predicate bit corresponding to an element in the low 256-bit segment of (3) is zero, that load is skipped, and cannot cause a fault.

## 512-bit SVE

Load each 8-bit element in the low 256-bit segment of (3) from the memory operand (2), or zero the element if the corresponding predicate bit in (1) is zero, then replicate that 128-bit segment to fill the register, ignoring the predicate. If the predicate bit corresponding to an element in the low 256-bit segment of (3) is zero, that load is skipped, and cannot cause a fault.

## Larger sizes

## 1024-bit SVE

Load each 8-bit element in the low 256-bit segment of (3) from the memory operand (2), or zero the element if the corresponding predicate bit in (1) is zero, then replicate that 128-bit segment to fill the register, ignoring the predicate. If the predicate bit corresponding to an element in the low 256-bit segment of (3) is zero, that load is skipped, and cannot cause a fault.

## 2048-bit SVE

Load each 8-bit element in the low 256-bit segment of (3) from the memory operand (2), or zero the element if the corresponding predicate bit in (1) is zero, then replicate that 128-bit segment to fill the register, ignoring the predicate. If the predicate bit corresponding to an element in the low 256-bit segment of (3) is zero, that load is skipped, and cannot cause a fault.

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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.