SVE Instruction List by Dougall Johnson
LD1SH (vector plus immediate): Gather load signed halfwords to vector (immediate index)
LD1SH { Zt.S }, Pg/Z, [Zn.S, #imm] (SVE+NS
svint32_t svld1sh_gather[_u32base]_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset)
svuint32_t svld1sh_gather[_u32base]_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset)
128-bit SVE
Gather (load) and sign extend 16-bit values into the 32-bit elements of (3), from the corresponding 32-bit address from (2), plus an immediate. If the predicate bit from (1) corresponding to an element in (3) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The immediate offset is limited to 0 ≤ imm < 64, and must be divisible by two.
256-bit SVE
Gather (load) and sign extend 16-bit values into the 32-bit elements of (3), from the corresponding 32-bit address from (2), plus an immediate. If the predicate bit from (1) corresponding to an element in (3) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The immediate offset is limited to 0 ≤ imm < 64, and must be divisible by two.
512-bit SVE
Gather (load) and sign extend 16-bit values into the 32-bit elements of (3), from the corresponding 32-bit address from (2), plus an immediate. If the predicate bit from (1) corresponding to an element in (3) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The immediate offset is limited to 0 ≤ imm < 64, and must be divisible by two.
Larger sizes
1024-bit SVE
Gather (load) and sign extend 16-bit values into the 32-bit elements of (3), from the corresponding 32-bit address from (2), plus an immediate. If the predicate bit from (1) corresponding to an element in (3) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The immediate offset is limited to 0 ≤ imm < 64, and must be divisible by two.
2048-bit SVE
Gather (load) and sign extend 16-bit values into the 32-bit elements of (3), from the corresponding 32-bit address from (2), plus an immediate. If the predicate bit from (1) corresponding to an element in (3) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The immediate offset is limited to 0 ≤ imm < 64, and must be divisible by two.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.