SVE Instruction List by Dougall Johnson
# LD1W (scalar plus vector): Gather load unsigned words to vector (vector index)

LD1W { Zt.S }, Pg/Z, [Xn, Zm.S, SXTW #2] (SVE+NS

LD1W { Zt.S }, Pg/Z, [Xn, Zm.S, UXTW #2] (SVE+NS

svfloat32_t svld1_gather_[s32]index[_f32](svbool_t pg, const float32_t *base, svint32_t indices)

svint32_t svld1_gather_[s32]index[_s32](svbool_t pg, const int32_t *base, svint32_t indices)

svuint32_t svld1_gather_[s32]index[_u32](svbool_t pg, const uint32_t *base, svint32_t indices)

svfloat32_t svld1_gather_[u32]index[_f32](svbool_t pg, const float32_t *base, svuint32_t indices)

svint32_t svld1_gather_[u32]index[_s32](svbool_t pg, const int32_t *base, svuint32_t indices)

svuint32_t svld1_gather_[u32]index[_u32](svbool_t pg, const uint32_t *base, svuint32_t indices)

## 128-bit SVE

Gather (load) 32-bit values into (3), from a base address (Xn/base), plus each corresponding sign-or-zero-extended 32-bit offset from (2) multiplied by four. If the predicate bit from (1) corresponding to an element in (3) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero.

## 256-bit SVE

Gather (load) 32-bit values into (3), from a base address (Xn/base), plus each corresponding sign-or-zero-extended 32-bit offset from (2) multiplied by four. If the predicate bit from (1) corresponding to an element in (3) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero.

## 512-bit SVE

Gather (load) 32-bit values into (3), from a base address (Xn/base), plus each corresponding sign-or-zero-extended 32-bit offset from (2) multiplied by four. If the predicate bit from (1) corresponding to an element in (3) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero.

## Larger sizes

## 1024-bit SVE

Gather (load) 32-bit values into (3), from a base address (Xn/base), plus each corresponding sign-or-zero-extended 32-bit offset from (2) multiplied by four. If the predicate bit from (1) corresponding to an element in (3) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero.

## 2048-bit SVE

Gather (load) 32-bit values into (3), from a base address (Xn/base), plus each corresponding sign-or-zero-extended 32-bit offset from (2) multiplied by four. If the predicate bit from (1) corresponding to an element in (3) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero.

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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.