SVE Instruction List by Dougall Johnson
See "LD3B (scalar plus immediate)" in the exploration tools

LD3B (scalar plus immediate): Contiguous load three-byte structures to three vectors (immediate index)

LD3B { Zt1.B, Zt2.B, Zt3.B }, Pg/Z, [Xn{, #imm, MUL VL}] (SVE (SME
svint8x3_t svld3_vnum[_s8](svbool_t pg, const int8_t *base, int64_t vnum)
svuint8x3_t svld3_vnum[_u8](svbool_t pg, const uint8_t *base, int64_t vnum)

128-bit SVE

Load and deinterleave groups of three interleaved 8-bit values from the memory operand (1) into the 8-bit elements of three consecutive registers (2), (3), and (4). If the predicate bit corresponding to an element in (2), (3), and (4) is zero, those three contiguous loads are skipped, and cannot cause a fault, and the elements are set to zero.

256-bit SVE

Load and deinterleave groups of three interleaved 8-bit values from the memory operand (1) into the 8-bit elements of three consecutive registers (2), (3), and (4). If the predicate bit corresponding to an element in (2), (3), and (4) is zero, those three contiguous loads are skipped, and cannot cause a fault, and the elements are set to zero.

512-bit SVE

Load and deinterleave groups of three interleaved 8-bit values from the memory operand (1) into the 8-bit elements of three consecutive registers (2), (3), and (4). If the predicate bit corresponding to an element in (2), (3), and (4) is zero, those three contiguous loads are skipped, and cannot cause a fault, and the elements are set to zero.

Larger sizes

1024-bit SVE

Load and deinterleave groups of three interleaved 8-bit values from the memory operand (1) into the 8-bit elements of three consecutive registers (2), (3), and (4). If the predicate bit corresponding to an element in (2), (3), and (4) is zero, those three contiguous loads are skipped, and cannot cause a fault, and the elements are set to zero.

2048-bit SVE

Load and deinterleave groups of three interleaved 8-bit values from the memory operand (1) into the 8-bit elements of three consecutive registers (2), (3), and (4). If the predicate bit corresponding to an element in (2), (3), and (4) is zero, those three contiguous loads are skipped, and cannot cause a fault, and the elements are set to zero.

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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.