SVE Instruction List by Dougall Johnson
LD4B (scalar plus immediate): Contiguous load four-byte structures to four vectors (immediate index)
LD4B { Zt1.B, Zt2.B, Zt3.B, Zt4.B }, Pg/Z, [Xn{, #imm, MUL VL}] (SVE (SME
svint8x4_t svld4_vnum[_s8](svbool_t pg, const int8_t *base, int64_t vnum)
svuint8x4_t svld4_vnum[_u8](svbool_t pg, const uint8_t *base, int64_t vnum)
128-bit SVE
Load and deinterleave groups of four interleaved 8-bit values from the memory operand (1) into the 8-bit elements of four consecutive registers (2), (3), (4), and (5). If the predicate bit corresponding to an element in (2), (3), (4), and (5) is zero, those four contiguous loads are skipped, and cannot cause a fault, and the elements are set to zero.
256-bit SVE
Load and deinterleave groups of four interleaved 8-bit values from the memory operand (1) into the 8-bit elements of four consecutive registers (2), (3), (4), and (5). If the predicate bit corresponding to an element in (2), (3), (4), and (5) is zero, those four contiguous loads are skipped, and cannot cause a fault, and the elements are set to zero.
512-bit SVE
Load and deinterleave groups of four interleaved 8-bit values from the memory operand (1) into the 8-bit elements of four consecutive registers (2), (3), (4), and (5). If the predicate bit corresponding to an element in (2), (3), (4), and (5) is zero, those four contiguous loads are skipped, and cannot cause a fault, and the elements are set to zero.
Larger sizes
1024-bit SVE
Load and deinterleave groups of four interleaved 8-bit values from the memory operand (1) into the 8-bit elements of four consecutive registers (2), (3), (4), and (5). If the predicate bit corresponding to an element in (2), (3), (4), and (5) is zero, those four contiguous loads are skipped, and cannot cause a fault, and the elements are set to zero.
2048-bit SVE
Load and deinterleave groups of four interleaved 8-bit values from the memory operand (1) into the 8-bit elements of four consecutive registers (2), (3), (4), and (5). If the predicate bit corresponding to an element in (2), (3), (4), and (5) is zero, those four contiguous loads are skipped, and cannot cause a fault, and the elements are set to zero.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.