SVE Instruction List by Dougall Johnson
LDNT1D (scalar plus scalar, single register): Contiguous load non-temporal doublewords to vector (scalar index)
LDNT1D { Zt.D }, Pg/Z, [Xn, Xm, LSL #3] (SVE (SME
svfloat64_t svldnt1[_f64](svbool_t pg, const float64_t *base)
svint64_t svldnt1[_s64](svbool_t pg, const int64_t *base)
svuint64_t svldnt1[_u64](svbool_t pg, const uint64_t *base)
128-bit SVE
Load 64-bit values from the memory operand (1) with a non-temporal hint, and zero extend them, writing the results to the 64-bit elements of (2). If the predicate bit corresponding to an element in (2) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The non-temporal hint means that the memory is unlikely to be accessed again soon.
256-bit SVE
Load 64-bit values from the memory operand (1) with a non-temporal hint, and zero extend them, writing the results to the 64-bit elements of (2). If the predicate bit corresponding to an element in (2) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The non-temporal hint means that the memory is unlikely to be accessed again soon.
512-bit SVE
Load 64-bit values from the memory operand (1) with a non-temporal hint, and zero extend them, writing the results to the 64-bit elements of (2). If the predicate bit corresponding to an element in (2) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The non-temporal hint means that the memory is unlikely to be accessed again soon.
Larger sizes
1024-bit SVE
Load 64-bit values from the memory operand (1) with a non-temporal hint, and zero extend them, writing the results to the 64-bit elements of (2). If the predicate bit corresponding to an element in (2) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The non-temporal hint means that the memory is unlikely to be accessed again soon.
2048-bit SVE
Load 64-bit values from the memory operand (1) with a non-temporal hint, and zero extend them, writing the results to the 64-bit elements of (2). If the predicate bit corresponding to an element in (2) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The non-temporal hint means that the memory is unlikely to be accessed again soon.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.