LDNT1W (scalar plus immediate, single register): Contiguous load non-temporal words to vector (immediate index)

LDNT1W { Zt.S }, Pg/Z, [Xn{, #imm, MUL VL}] (SVE (SME

Load 32-bit values from the memory operand (1) with a non-temporal hint, and zero extend them, writing the results to the 32-bit elements of (2). If the predicate bit corresponding to an element in (2) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The non-temporal hint means that the memory is unlikely to be accessed again soon.

Load 32-bit values from the memory operand (1) with a non-temporal hint, and zero extend them, writing the results to the 32-bit elements of (2). If the predicate bit corresponding to an element in (2) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The non-temporal hint means that the memory is unlikely to be accessed again soon.

Load 32-bit values from the memory operand (1) with a non-temporal hint, and zero extend them, writing the results to the 32-bit elements of (2). If the predicate bit corresponding to an element in (2) is zero, that load is skipped, and cannot cause a fault, and the element is set to zero. The non-temporal hint means that the memory is unlikely to be accessed again soon.