See "LSL (wide elements, predicated)" in the exploration tools

LSL (wide elements, predicated): Logical shift left by 64-bit wide elements (predicated)

LSL Zdn.H, Pg/M, Zdn.H, Zm.D (SVE (SME

svint16_t svlsl_wide[_s16]_m(svbool_t pg, svint16_t op1, svuint64_t op2)

svuint16_t svlsl_wide[_u16]_m(svbool_t pg, svuint16_t op1, svuint64_t op2)

128-bit SVE

For each 16-bit unsigned integer set (3) to (2) shifted left by the corresponding 64-bit value from (1). If the shift amount from (1) is greater than 15 or less than 0, the result is 0.

256-bit SVE

For each 16-bit unsigned integer set (3) to (2) shifted left by the corresponding 64-bit value from (1). If the shift amount from (1) is greater than 15 or less than 0, the result is 0.

512-bit SVE

For each 16-bit unsigned integer set (3) to (2) shifted left by the corresponding 64-bit value from (1). If the shift amount from (1) is greater than 15 or less than 0, the result is 0.

Larger sizes

1024-bit SVE

For each 16-bit unsigned integer set (3) to (2) shifted left by the corresponding 64-bit value from (1). If the shift amount from (1) is greater than 15 or less than 0, the result is 0.

2048-bit SVE

For each 16-bit unsigned integer set (3) to (2) shifted left by the corresponding 64-bit value from (1). If the shift amount from (1) is greater than 15 or less than 0, the result is 0.

Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.