See "LSR (wide elements, unpredicated)" in the exploration tools

LSR (wide elements, unpredicated): Logical shift right by 64-bit wide elements (unpredicated)

LSR Zd.H, Zn.H, Zm.D (SVE (SME

svuint16_t svlsr_wide[_u16]_x(svbool_t pg, svuint16_t op1, svuint64_t op2)

128-bit SVE

For each 16-bit unsigned integer set (3) to (2) shifted right by the corresponding 64-bit value from (1). If the shift amount from (1) is greater than 15 or less than 0, the result is 0.

256-bit SVE

For each 16-bit unsigned integer set (3) to (2) shifted right by the corresponding 64-bit value from (1). If the shift amount from (1) is greater than 15 or less than 0, the result is 0.

512-bit SVE

For each 16-bit unsigned integer set (3) to (2) shifted right by the corresponding 64-bit value from (1). If the shift amount from (1) is greater than 15 or less than 0, the result is 0.

Larger sizes

1024-bit SVE

For each 16-bit unsigned integer set (3) to (2) shifted right by the corresponding 64-bit value from (1). If the shift amount from (1) is greater than 15 or less than 0, the result is 0.

2048-bit SVE

For each 16-bit unsigned integer set (3) to (2) shifted right by the corresponding 64-bit value from (1). If the shift amount from (1) is greater than 15 or less than 0, the result is 0.

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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.