SVE Instruction List by Dougall Johnson
See "ORR (vectors, unpredicated)" in the exploration tools

ORR (vectors, unpredicated): Bitwise inclusive OR vectors (unpredicated)

ORR Zd.D, Zn.D, Zm.D (SVE (SME
svint8_t svorr[_s8]_x(svbool_t pg, svint8_t op1, svint8_t op2)
svint16_t svorr[_s16]_x(svbool_t pg, svint16_t op1, svint16_t op2)
svint32_t svorr[_s32]_x(svbool_t pg, svint32_t op1, svint32_t op2)
svint64_t svorr[_s64]_x(svbool_t pg, svint64_t op1, svint64_t op2)
svuint8_t svorr[_u8]_x(svbool_t pg, svuint8_t op1, svuint8_t op2)
svuint16_t svorr[_u16]_x(svbool_t pg, svuint16_t op1, svuint16_t op2)
svuint32_t svorr[_u32]_x(svbool_t pg, svuint32_t op1, svuint32_t op2)
svuint64_t svorr[_u64]_x(svbool_t pg, svuint64_t op1, svuint64_t op2)

128-bit SVE

For each bit set (3) to (1) | (2).

256-bit SVE

For each bit set (3) to (1) | (2).

512-bit SVE

For each bit set (3) to (1) | (2).
Larger sizes

1024-bit SVE

For each bit set (3) to (1) | (2).

2048-bit SVE

For each bit set (3) to (1) | (2).
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.