SVE Instruction List by Dougall Johnson
ORRS: Bitwise inclusive OR predicates, setting the condition flags
ORRS Pd.B, Pg/Z, Pn.B, Pm.B (SVE (SME
128-bit SVE
For each active bit, set (3) to
(1) | (2). Inactive bits are zeroed. This operation sets flags based on the resulting predicate (3) and the governing predicate. See
PTEST for details.
256-bit SVE
For each active bit, set (3) to
(1) | (2). Inactive bits are zeroed. This operation sets flags based on the resulting predicate (3) and the governing predicate. See
PTEST for details.
512-bit SVE
For each active bit, set (3) to
(1) | (2). Inactive bits are zeroed. This operation sets flags based on the resulting predicate (3) and the governing predicate. See
PTEST for details.
Larger sizes
1024-bit SVE
For each active bit, set (3) to
(1) | (2). Inactive bits are zeroed. This operation sets flags based on the resulting predicate (3) and the governing predicate. See
PTEST for details.
2048-bit SVE
For each active bit, set (3) to
(1) | (2). Inactive bits are zeroed. This operation sets flags based on the resulting predicate (3) and the governing predicate. See
PTEST for details.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.