SVE Instruction List by Dougall Johnson
PEXT (predicate): Predicate extract from predicate-as-counter
PEXT Pd.S, PNn[imm] (SVE2.1 (SME2+S
svbool_t svpext_lane_c32(svcount_t pnn, uint64_t imm)
128-bit SVE
Decode (1) from predicate-as-counter representation to a quadruple-length predicate, select the quarter indicated by imm, and copy the bits corresponding to 32-bit elements to (2), zeroing all other bits.
256-bit SVE
Decode (1) from predicate-as-counter representation to a quadruple-length predicate, select the quarter indicated by imm, and copy the bits corresponding to 32-bit elements to (2), zeroing all other bits.
512-bit SVE
Decode (1) from predicate-as-counter representation to a quadruple-length predicate, select the quarter indicated by imm, and copy the bits corresponding to 32-bit elements to (2), zeroing all other bits.
Larger sizes
1024-bit SVE
Decode (1) from predicate-as-counter representation to a quadruple-length predicate, select the quarter indicated by imm, and copy the bits corresponding to 32-bit elements to (2), zeroing all other bits.
2048-bit SVE
Decode (1) from predicate-as-counter representation to a quadruple-length predicate, select the quarter indicated by imm, and copy the bits corresponding to 32-bit elements to (2), zeroing all other bits.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.