SVE Instruction List by Dougall Johnson
PMOV (to vector): Move predicate to vector
PMOV Zd[imm], Pn.D (SVE2.1 (SME2.1
128-bit SVE
On 128-bit SVE, take the 2 predicate bits corresponding to 64-bit elements from (2), and write them within the low 16 bits of a vector register (3), starting from bit 2 * imm. If imm is zero, all other bits are zeroed. Otherwise, all other bits are preserved from (1).
256-bit SVE
On 256-bit SVE, take the 4 predicate bits corresponding to 64-bit elements from (2), and write them within the low 32 bits of a vector register (3), starting from bit 4 * imm. If imm is zero, all other bits are zeroed. Otherwise, all other bits are preserved from (1).
512-bit SVE
On 512-bit SVE, take the 8 predicate bits corresponding to 64-bit elements from (2), and write them within the low 64 bits of a vector register (3), starting from bit 8 * imm. If imm is zero, all other bits are zeroed. Otherwise, all other bits are preserved from (1).
Larger sizes
1024-bit SVE
On 1024-bit SVE, take the 16 predicate bits corresponding to 64-bit elements from (2), and write them within the low 128 bits of a vector register (3), starting from bit 16 * imm. If imm is zero, all other bits are zeroed. Otherwise, all other bits are preserved from (1).
2048-bit SVE
On 2048-bit SVE, take the 32 predicate bits corresponding to 64-bit elements from (2), and write them within the low 256 bits of a vector register (3), starting from bit 32 * imm. If imm is zero, all other bits are zeroed. Otherwise, all other bits are preserved from (1).
Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.