SVE Instruction List by Dougall Johnson
PTRUE (predicate): Initialise predicate from named constraint
PTRUE Pd.S{, pattern} (SVE (SME
svbool_t svptrue_pat_b32(enum svpattern pattern)
128-bit SVE
If the constraint (
pattern) can be satisfied, set the low predicate bits of (1) corresponding to 32-bit elements that match the constraint, zeroing all other bits. If the constraint cannot be satisfied, zero all bits of (1). If
pattern is omitted, the
ALL constraint is used.
On 128-bit SVE, the following predicate bits of (1) corresponding to 32-bit elements are set:
VL1, VL2, VL3: sets the low nMUL3: sets the low 3ALL, POW2, MUL4, VL4: sets all- any other constraint sets none
256-bit SVE
If the constraint (
pattern) can be satisfied, set the low predicate bits of (1) corresponding to 32-bit elements that match the constraint, zeroing all other bits. If the constraint cannot be satisfied, zero all bits of (1). If
pattern is omitted, the
ALL constraint is used.
On 256-bit SVE, the following predicate bits of (1) corresponding to 32-bit elements are set:
VL1, VL2, VL3, VL4, VL5, VL6, VL7: sets the low nMUL3: sets the low 6ALL, POW2, MUL4, VL8: sets all- any other constraint sets none
512-bit SVE
If the constraint (
pattern) can be satisfied, set the low predicate bits of (1) corresponding to 32-bit elements that match the constraint, zeroing all other bits. If the constraint cannot be satisfied, zero all bits of (1). If
pattern is omitted, the
ALL constraint is used.
On 512-bit SVE, the following predicate bits of (1) corresponding to 32-bit elements are set:
VL1, VL2, VL3, VL4, VL5, VL6, VL7, VL8: sets the low nMUL3: sets the low 15ALL, POW2, MUL4, VL16: sets all- any other constraint sets none
Larger sizes
1024-bit SVE
If the constraint (
pattern) can be satisfied, set the low predicate bits of (1) corresponding to 32-bit elements that match the constraint, zeroing all other bits. If the constraint cannot be satisfied, zero all bits of (1). If
pattern is omitted, the
ALL constraint is used.
On 1024-bit SVE, the following predicate bits of (1) corresponding to 32-bit elements are set:
VL1, VL2, VL3, VL4, VL5, VL6, VL7, VL8, VL16: sets the low nMUL3: sets the low 30ALL, POW2, MUL4, VL32: sets all- any other constraint sets none
2048-bit SVE
If the constraint (
pattern) can be satisfied, set the low predicate bits of (1) corresponding to 32-bit elements that match the constraint, zeroing all other bits. If the constraint cannot be satisfied, zero all bits of (1). If
pattern is omitted, the
ALL constraint is used.
On 2048-bit SVE, the following predicate bits of (1) corresponding to 32-bit elements are set:
VL1, VL2, VL3, VL4, VL5, VL6, VL7, VL8, VL16, VL32: sets the low nMUL3: sets the low 63ALL, POW2, MUL4, VL64: sets all- any other constraint sets none
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.