SVE Instruction List by Dougall Johnson
RSHRNT: Rounding shift right narrow by immediate (top)
RSHRNT Zd.H, Zn.S, #const (SVE2 (SME
svint16_t svrshrnt[_n_s32](svint16_t even, svint32_t op1, uint64_t imm2)
svuint16_t svrshrnt[_n_u32](svuint16_t even, svuint32_t op1, uint64_t imm2)
128-bit SVE
For each 32-bit integer set the odd 16-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, preserving even elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 16.
256-bit SVE
For each 32-bit integer set the odd 16-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, preserving even elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 16.
512-bit SVE
For each 32-bit integer set the odd 16-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, preserving even elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 16.
Larger sizes
1024-bit SVE
For each 32-bit integer set the odd 16-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, preserving even elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 16.
2048-bit SVE
For each 32-bit integer set the odd 16-bit elements of (2) to ( (1) + ( 1 << ( const − 1 ) ) >> const, preserving even elements. This is the same as a regular shift, but with result incremented if the most-significant bit that was shifted out was set. The shift amount is limited to 1 ≤ const ≤ 16.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.