SVE Instruction List by Dougall Johnson
SHRNB: Shift right narrow by immediate (bottom)
SHRNB Zd.H, Zn.S, #const (SVE2 (SME
svint16_t svshrnb[_n_s32](svint32_t op1, uint64_t imm2)
svuint16_t svshrnb[_n_u32](svuint32_t op1, uint64_t imm2)
128-bit SVE
For each 32-bit integer set the even 16-bit elements of (2) to (1) >> const, and zero odd elements. The shift amount is limited to 1 ≤ const ≤ 16.
256-bit SVE
For each 32-bit integer set the even 16-bit elements of (2) to (1) >> const, and zero odd elements. The shift amount is limited to 1 ≤ const ≤ 16.
512-bit SVE
For each 32-bit integer set the even 16-bit elements of (2) to (1) >> const, and zero odd elements. The shift amount is limited to 1 ≤ const ≤ 16.
Larger sizes
1024-bit SVE
For each 32-bit integer set the even 16-bit elements of (2) to (1) >> const, and zero odd elements. The shift amount is limited to 1 ≤ const ≤ 16.
2048-bit SVE
For each 32-bit integer set the even 16-bit elements of (2) to (1) >> const, and zero odd elements. The shift amount is limited to 1 ≤ const ≤ 16.
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.