SVE Instruction List by Dougall Johnson
# SMINQV: Signed minimum reduction of quadword vector segments

SMINQV Vd.16B, Pg, Zn.B (SVE2.1 (SME2.1

## 128-bit SVE

Take the minimum across corresponding active signed 8-bit integer elements from each 128-bit segment of (1), storing the result in (3). For any element where the corresponding predicate bit in (2) is 0, interpret it as 0x7F.

## 256-bit SVE

Take the minimum across corresponding active signed 8-bit integer elements from each 128-bit segment of (1), storing the result in (3). For any element where the corresponding predicate bit in (2) is 0, interpret it as 0x7F.

## 512-bit SVE

Take the minimum across corresponding active signed 8-bit integer elements from each 128-bit segment of (1), storing the result in (3). For any element where the corresponding predicate bit in (2) is 0, interpret it as 0x7F.

## Larger sizes

## 1024-bit SVE

Take the minimum across corresponding active signed 8-bit integer elements from each 128-bit segment of (1), storing the result in (3). For any element where the corresponding predicate bit in (2) is 0, interpret it as 0x7F.

## 2048-bit SVE

Take the minimum across corresponding active signed 8-bit integer elements from each 128-bit segment of (1), storing the result in (3). For any element where the corresponding predicate bit in (2) is 0, interpret it as 0x7F.

Report mistakes or give feedback

Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.