SVE Instruction List by Dougall Johnson
SQCADD: Saturating complex integer add with 270° rotate
SQCADD Zdn.H, Zdn.H, Zm.H, #270 (SVE2 (SME
svint16_t svqcadd[_s16](svint16_t op1, svint16_t op2, 270)
128-bit SVE
For each pair of 16-bit integers, considered as the real and imaginary components of a complex number, set (3) to (2) + ( (1) rotated by 270° ), with signed saturation of each component to 0x7FFF or −0x8000 on overflow.
256-bit SVE
For each pair of 16-bit integers, considered as the real and imaginary components of a complex number, set (3) to (2) + ( (1) rotated by 270° ), with signed saturation of each component to 0x7FFF or −0x8000 on overflow.
512-bit SVE
For each pair of 16-bit integers, considered as the real and imaginary components of a complex number, set (3) to (2) + ( (1) rotated by 270° ), with signed saturation of each component to 0x7FFF or −0x8000 on overflow.
Larger sizes
1024-bit SVE
For each pair of 16-bit integers, considered as the real and imaginary components of a complex number, set (3) to (2) + ( (1) rotated by 270° ), with signed saturation of each component to 0x7FFF or −0x8000 on overflow.
2048-bit SVE
For each pair of 16-bit integers, considered as the real and imaginary components of a complex number, set (3) to (2) + ( (1) rotated by 270° ), with signed saturation of each component to 0x7FFF or −0x8000 on overflow.
Report mistakes or give feedback
Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.