SVE Instruction List by Dougall Johnson
SQCVTUN: Signed saturating unsigned extract narrow and interleave
SQCVTUN Zd.H, { Zn1.S, Zn2.S } (SVE2.1 (SME2
128-bit SVE
Truncate each signed 32-bit integer from (1) and (2) to 16 bits, with unsigned saturation to 0 (if the value is negative) or 0xFFFF, setting the even lanes of (3) to the corresponding results from (1), and the odd lanes to the corresponding results from (2).
256-bit SVE
Truncate each signed 32-bit integer from (1) and (2) to 16 bits, with unsigned saturation to 0 (if the value is negative) or 0xFFFF, setting the even lanes of (3) to the corresponding results from (1), and the odd lanes to the corresponding results from (2).
512-bit SVE
Truncate each signed 32-bit integer from (1) and (2) to 16 bits, with unsigned saturation to 0 (if the value is negative) or 0xFFFF, setting the even lanes of (3) to the corresponding results from (1), and the odd lanes to the corresponding results from (2).
Larger sizes
1024-bit SVE
Truncate each signed 32-bit integer from (1) and (2) to 16 bits, with unsigned saturation to 0 (if the value is negative) or 0xFFFF, setting the even lanes of (3) to the corresponding results from (1), and the odd lanes to the corresponding results from (2).
2048-bit SVE
Truncate each signed 32-bit integer from (1) and (2) to 16 bits, with unsigned saturation to 0 (if the value is negative) or 0xFFFF, setting the even lanes of (3) to the corresponding results from (1), and the odd lanes to the corresponding results from (2).
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Inspired by and based on the x86/x64 SIMD Instruction List by Daytime.